We are currently seeking engineers with experience in RTL development and verification targeted towards algorithm acceleration on FPGA and ASIC based platforms.

Candidates must have the following qualifications:

  • BS/MSc degree in Electrical Engineering or equivalent work experience in algorithm design, RTL implementation and verification
  • Experience with algorithm development and C/C++/Python for system model development and scripting
  • Experience with RTL design, simulation and verification in Verilog
  • Previous experience with PCIe, NVMe and RTL verification using System Verilog and Verilator would be considered an asset.

Please submit your resume to This email address is being protected from spambots. You need JavaScript enabled to view it.